MA320002【PDF 59/208 页】MODULE PLUG-IN PIC32 USB OTG

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TABLE 4-12:

SPI1-2 REGISTERS MAP (1,2)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

5800

SPI1CON

31:16

15:0

FRMEN

ON

FRMSYNC FRMPOL

FRZ SIDL

—

DISSDO

—

MODE32

—

MODE16

—

SMP

—

CKE

—

SSEN

—

CKP

—

MSTEN

—

—

—

—

—

—

SPIFE

—

—

—

0000

0000

5810 SPI1STAT

31:16

15:0

—

—

—

—

—

—

—

—

—

SPIBUSY

—

—

—

—

—

—

—

—

—

SPIROV

—

—

—

—

—

SPITBE

—

—

—

—

—

SPIRBF

0000

0000

5820

SPI1BUF

31:16

15:0

DATA<31:0>

0000

0000

5830

SPI1BRG

31:16

15:0

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

BRG<8:0>

—

—

—

—

0000

0000

5A00 SPI2CON

31:16

15:0

FRMEN

ON

FRMSYNC FRMPOL

FRZ SIDL

—

DISSDO

—

MODE32

—

MODE16

—

SMP

—

CKE

—

SSEN

—

CKP

—

MSTEN

—

—

—

—

—

—

SPIFE

—

—

—

0000

0000

5A10 SPI2STAT

31:16

15:0

—

—

—

—

—

—

—

—

—

SPIBUSY

—

—

—

—

—

—

—

—

—

SPIROV

—

—

—

—

—

SPITBE

—

—

—

—

—

SPIRBF

0000

0000

5A20

SPI2BUF

31:16

15:0

DATA<31:0>

0000

0000

5A30 SPI2BRG

31:16

15:0

—

—

—

—

—

—

—

—

—

—

—

—

— — — — — —

— BRG<8:0>

—

—

—

—

0000

0000

Legend:

Note 1:

2:

x = unknown value on Reset, — = unimplemented, read as ‘ 0 ’. Reset values are shown in hexadecimal.

All registers in this table except SPIxBUF have corresponding CLR, SET and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV

Registers” for more information.

SPI2 Module is not present on PIC32MX420FXXXX/440FXXXX devices.

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